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4층 PCB 스택업 및 임피던스 제어 파라미터 문의 > Q&A

Q&A

샘플 PCB 4층 PCB 스택업 및 임피던스 제어 파라미터 문의

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작성자 댓글 0건 조회 103회 작성일 26-01-05 17:09

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hello,

My name is Thinh and I work in the AI & IC Design Lab at Inha University. I'm currently working on a high-speed circuit design project and would like to inquire about layer stackup and impedance control routing for your four-layer PCB fabrication.

1. Standard 4-layer stackup information

Could you provide your standard 4-layer PCB stackup specifications? The following parameters are required:

  • Types of dielectric materials (FR-4, prepreg, etc.)
  • Dielectric thickness between each layer
  • Copper thickness of each layer (signal layer and ground layer)
  • Dielectric constant (Dk) and loss tangent (Df) values at target frequency

2. Impedance control parameters

For impedance-controlled routing, transmission lines must be designed with a specific target impedance (e.g., 50Ω single-ended, 100Ω differential). Please consider the following:

  • Recommended trace width and spacing for target impedance
  • Manufacturing tolerances for trace width and dielectric thickness
  • Impedance tolerance (typically ±10%?)

3. Impedance calculation tool

I would like to inquire whether your company provides an impedance calculator or stackup design tool to help us check manufacturability during the design phase.

I've attached a stackup image for reference. Please let me know if this configuration is feasible or if any modifications are needed.

Please review and I look forward to your response.

thank you

Thinh Nguyen, AI & IC Design Lab, Inha University

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